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vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 1 05/23/01 ? vitesse semiconductor corporation ? 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com features general description the VSC830 is a monolithic dual 2x2 asynchronous crosspoint switch, designed for critical signal path control and buffering applications, such as loop-back, protection switching, and multi-channel backplane driver/receivers. signal path delay is tightly matched between each output channel to eliminate the need for delay path compensation when switching between signal sources. the crosspoint function is based on a multiplexer tree architecture. each 2x2 switch can be considered as a pair of 2:1 multiplexers that share the same inputs. the signal path through each switch is fully differential and delay matched. the signal path is unregistered, so there are no restrictions on the phase, frequency, or signal pattern at each input. unused outputs can be independently powered off, thereby eliminating power on unused sections (see design guide section in this data sheet). the switch control inputs can be configured to be com- patible with pecl or ttl levels. the high-speed input and output levels are nominally pecl compatible and capable of interfacing with a wide range of termination schemes. VSC830 symbol diagram ? dual 2x2 crosspoint switch 2.7gb/s nrz data bandwidth, 2.7ghz signal bandwidth pecl/ttl-compatible control inputs pecl-compatible high-speed i/o 50 ? source terminated output driver and programmable input terminations single 3.3v supply, 1w typical dissipation power-down capability for unused outputs compact 44-pin pqfp, 10x10mm package a1 y1 a2 y2 s1,s2 a1 y1 a2 y2 s1,s2
vitesse semiconductor corporation data sheet VSC830 2.7gb/s asynchronous dual 2x2 crosspoint switch 2.7gb/s asynchronous page 2 g52192-0, rev 4.0 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com functional block diagram 0 1 sl y1b y1bn vccp1b 0 1 sl y2b y2bn vccp2b vee1b vee2b s2b a2b+ a2b- s1b a1b+ a1b- 0 1 sl y1a y1an vccp1a 0 1 sl y2a y2an vccp2a vee1a vee2a s2a a2a+ a2a- s1a a1a+ a1a- pemode vcc term_enable_a term_enable_b
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 3 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com functional description select as shown in figure 1, each output can be treated as a 2:1 multiplexer, with the a1 and a2 inputs common to both multiplexers. the select input s1 independently controls the state of the multiplexer that drives output y1, and select input s2 independently controls the output of y2. figure 1: select functional block diagram table 1 specifies the function of the select inputs. table 1: select function mode the interface level of the select pins, s1 and s2, can be programmed to either ttl or pecl levels by short- ing the mode pin to either v cc or v ee . note that the mode pin must be tied to either v cc or v ee . the func- tion of mode is specified in table 2. table 2: mode function s1 s2 y1 y2 0 0 a1 a1 1 0 a2 a1 0 1 a1 a2 1 1 a2 a2 mode s1, s2 v ee ttl v cc pecl a1 a2 y1 y2 s1 s2
vitesse semiconductor corporation data sheet VSC830 2.7gb/s asynchronous dual 2x2 crosspoint switch 2.7gb/s asynchronous page 4 g52192-0, rev 4.0 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com power-down power to each output stage is provided through v cc , v ccp , and v ee . v cc is common to all outputs. to power off unused outputs, tie the respective v ee and v ccp pin to v cc , as shown in figure 2. figure 2: power-down mode example minimum power configuration requires output channel 1a active, so power must be applied to v ccp 1a and v ee 1a at all times. programmable input termination across each differential input (from the + input to the - input) of the VSC830 is a switched 100 ? termina- tion resistor. using the term_enable pin, the termination can be optionally disabled. to enable the input termination, connect the respective term_enable pin to v cc . to disable the internal termination, connect term_enable to v ee . if unconnected, the term_enable pin will self-bias to v ee and disable the inter- nal termination. independent termination controls are provided for the ? a ? and ? b ? switches. v ccp 1a v ee 1a v ccp 2a v ee 2a v ccp 1b v ee 1b v ccp 2b v ee 2b v cc ? off ? ? off ? ? on ? ? on ?
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 5 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com ac characteristics table 3: ac timing notes: (1) tested on a sample basis only, with 2 23 -1 prbs data, input signal rise/fall time < 150ps. value stated in table is added to measurement system jitter. (2) input signal rise/fall time < 150ps, measured using an alternating 1, 0 pattern. dc characteristics ( all characteristics are over the specified operating conditions) table 4: power supply note: specified with outputs terminated, 100 ? between true and complement, v cc = 3.45v. table 5: select input levels?ttl mode table 6: select input levels?pecl mode table 7: control inputs symbol parameter min typ max units f rate signal path data rate 2.7 gb/s f bw signal path bandwidth (-3db) 2.7 ghz t skw channel to channel delay skew 50 ps t con switch configuration setup time (1) 1ns t r , t f high-speed output rise/fall times, 20% to 80% (2) 150 ps t jp signal path added jitter, peak-peak (1) 40 ps symbol parameter min typ max units conditions i cc total v cc(p) supply current 350 ma p d power dissipation per output (y1a, y2a, y1b, y2b) 300 mw p t total chip power (all outputs powered on) 1.2 w symbol parameter min typ max units conditions v ih input high voltage (ttl) 2.0 v v il input low voltage (ttl) 0.8 v i ih input high current (ttl) 500 av in = 2.4v i il input low current (ttl) -500 av in = 0.5v symbol parameter min typ max units conditions v ih input high voltage (pecl) v cc - 1.0 v v il input low voltage (pecl) v cc - 1.6 v i ih input high current (pecl) 500 av in = 2.5v i il input low current (pecl) -500 av in = 1.5v symbol parameter min typ max units conditions r pemode pemode pin impedance 3100 ?
vitesse semiconductor corporation data sheet VSC830 2.7gb/s asynchronous dual 2x2 crosspoint switch 2.7gb/s asynchronous page 6 g52192-0, rev 4.0 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com table 8: ? a ? input levels (differential pecl) note: (1) peak-to-peak swing of each side of the differential input. table 9: ? y ? output levels (differential pecl) notes: (1) peak-peak swing of each side of the differential output. 2 23 -1 prbs data. (2) peak-to-peak swing of each side of the differential output. alternating 1, 0 pattern. absolute maximum ratings power supply voltage (v cc ) potential to gnd ..............................................................................-0.5v to +4.0v ttl input voltage applied ................................................................................................... -0 .5v to v cc +0.5v ecl input voltage applied .................................................................................................... - 0.5v to v cc +0.5v output current (i out ) .............................................................................................................................. ...... 50ma case temperature under bias (t c ) .............................................................................................-55 o c to + 125 o c storage temperature (t stg )........................................................................................................-65 o c to + 150 o c note: (1) caution: stresses listed under ?absolute maximum ratings? may be applied to devices one at a time without causing permanent damage. functionality at or exceeding the values listed is not implied. exposure to these values for extended periods may affect device reliability. operating conditions supply voltage (v ee ) .............................................................................................................................. ............ 0v supply voltage (v cc ) ............................................................................................................................ +3 .3v 5% supply voltage (v ccp ) .......................................................................................................................... +3.3 v 5% operating range (1) (t) ..................................................................................................................... 0 o c to +85 o c note: (1) lower limit of specification is ambient temperature and upper limit is case temperature. esd ratings proper esd procedures should be used when handling this product. the VSC830 is rated to the following esd voltages based on the human body model: 1. all pins are rated at or above 1500v. symbol parameter min typ max units conditions v id input differential voltage 200 1000 mv see note 1 v icm input common-mode voltage v cc - 1.7 v cc - 0.9 v symbol parameter min typ max units conditions v od1 output differential voltage (data) 400 700 1000 mv see note 1 v od2 output differential voltage (clock) 400 550 850 mv see note 2 v ocm output common-mode voltage v cc - 1.6 v cc - 1.0 v
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 7 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com package pin descriptions figure 3: pin diagram v cc s2a a2a+ a2a- v cc pemode v cc a1b+ a1b- s1b v cc 1 2 3 4 5 6 7 8 9 10 11 v ee 2a v ee 2a y2a+ y2a- v cc p2a v cc v cc p1b y1b+ y1b- v ee 1b v ee 1b 33 32 31 30 29 28 27 26 25 24 23 v cc s2b a2b+ a2b- v cc term_enable_b v cc p2b y2b- y2b+ v ee 2b v ee 2b v cc s1a a1a- a1a+ v cc term_enable_a v cc p1a y1a+ y1a- v ee 1a v ee 1a 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 VSC830
vitesse semiconductor corporation data sheet VSC830 2.7gb/s asynchronous dual 2x2 crosspoint switch 2.7gb/s asynchronous page 8 g52192-0, rev 4.0 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com table 10: pin identification signal name pin(s) function description v cc 1, 5, 7, 11, 12, 16, 28, 40, 44 positive supply global supply for chip v ee 1a 34, 35 negative supply for channel output 1a. must always be powered on. v ee 2a 32, 33 negative supply for output 2a. connect to vcc to power-off. v ee 1b 23, 24 negative supply for output 1b. connect to vcc to power-off. v ee 2b 21, 22 negative supply for output 2b. connect to vcc to power-off. v cc p1a 38 positive supply output driver supply for channel 1a v cc p2a 29 positive supply output driver supply for channel 2a v cc p1b 27 positive supply output driver supply for channel 1b v cc p2b 18 positive supply output driver supply for channel 2b term_enable_a 39 termination enable input termination enable for the ? a ? switch. normally low (vee). connect to vcc to enable internal 100 ohm termination between axa+ inputs. term_enable_b 17 termination enable input termination enable for the ? b ? switch. normally low (vee). connect to vcc to enable internal 100 ? termination between axa+ inputs. pemode 6 control pecl/ttl interface control a1a 41, 42 pecl input channel 1a differential signal input s1a 43 pecl/ttl input channel 1a input selector y1a 37, 36 pecl output channel 1a differential output a2a 3, 4 pecl input channel 2a differential signal input s2a 2 pecl/ttl input channel 2a input selector y2a 31, 30 pecl output channel 2a differential output a1b 8, 9 pecl input channel 1b differential signal input s1b 10 pecl/ttl input channel 1b input selector y1b 26, 25 pecl output channel 1b differential output a2b 14, 15 pecl input channel 2b differential signal input s2b 13 pecl/ttl input channel 2b input selector y2b 20, 19 pecl output channel 2b differential output
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 9 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com package thermal characteristics the VSC830 is packaged into a standard plastic quad flatpack with an embedded, but unexposed thermal slug. this package adheres to industry-standard eiaj footprints for a 10x10mm body, 44 lead pqfp. the pack- age construction is as shown in figure 4. the 44-pin pqfp with embedded slug has the thermal properties shown in table 11. this package allows the VSC830 to operate with ambient temperatures up to 70 o c in still air. figure 4: package cross reference table 11: 44-pin pqfp thermal resistance note: t a(max) = max case temperature - (max power dissipation ca airflow ). symbol description val ue ( o c/w) t a(max) ( o c) ca-0 thermal resistance from case-to-ambient, still air 28.4 50.9 ca-100 thermal resistance from case-to-ambient, 100 lfpm air 22.7 57.8 ca-200 thermal resistance from case-to-ambient, 200 lfpm air 19.9 61.1 ca-400 thermal resistance from case-to-ambient, 400 lfpm air 16.2 65.6 ca-600 thermal resistance from case-to-ambient, 600 lfpm air 13.9 68.3 lead die plastic molding compound insulator wire bond copper heat spreader
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 10 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com package information notes: 44 34 0.102 max. lead coplanarity 1 33 23 22 12 g f ih 10 o typ 0.17 max. l 10 o typ k d a 0.25 j 0 o - 8 o 0.25 max. e 0.20 rad. typ . 11 j 1 0.30 rad.typ. drawing not to scale. heat spreader up. all units in mm unless otherwise noted. package #: 101-299-1 issue #: 1 44-pin pqfp, 10mm x 10mm package drawing item mm tol. a2.45 max d 2.00 +.10 / -.05 e0.35 .05 f13.20 .25 g10.00 .10 h13.20 .25 i10.00 .10 j 0.88 +.15 / -.10 j1 0.80 +.15 / -.10 k0.80basic l3.56 .50 dia.
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 11 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com ordering information the order number for this product is formed by a combination of the device number, and package type. evaluation boards an evaluation board for the VSC830 is available. please contact your local sales representative. VSC830 xx device type package 2.7gb/s asynchronous qz: 44-pin pqfp, 10 x 10mm body dual 2x2 crosspint switch notice vitesse semiconductor corporation ( ? vitesse ? ) provides this document for informational purposes only. all information in this document, includ- ing descriptions of features, functions, performance, technical specifications and availability, is subject to change without n otice at any time. noth- ing contained in this document shall be construed as extending any warranty or promise, express or implied, that any vitesse pr oduct will be available as described or will be suitable for or will accomplish any particular task. vitesse products are not intended for use in life support appliances, devices or systems. use of a vitesse product in such appl ications without written consent is prohibited.
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 12 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com design guide introduction the purpose of this document is to make it easier for system designers to use the VSC830 2.7gb/s dual 2x2 crosspoint switch. this guide provides guidelines for i/o terminations, power supply decoupling and board lay- out. signal terminations the high-speed inputs (a1a+/-, a1b+/-, a2a+/- and a2b+/-) on the VSC830 are internally terminated with a programmable 100 ? termination between the true and complement input. the input termination can be disabled by connecting the term_enable pin to vee. high impedance internal biasing resistors provide the correct bias voltage at the inputs for ac-coupled applications (figure 5). figure 5: high-speed input termination v cc = 3.3 v v ee = gnd 2.0 v 2.0 v r | | = 3.15k ? (approx.) c in chip boundary z o c in typ = 0.1 f (capacitor value is selected for data input = 2.7gb/s) c in z o v cc = 3.3 v v ee = gnd 2.0 v 2.0 v r | | = 3.15 k ? (approx.) c in chip boundary z o r t = z o c in v tt v tt v tt = v cc - 1.3v 100 a) termination enabled b) termination disabled
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 13 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com the high-speed outputs (y1a+/-, y1b+/-, y2a+/- and y2b+/-) each consist of a differential pair designed to drive a 50 ? transmission line. the transmission line should be terminated with a 100 ? resistor at the receiver of the downstream device between the true and complement outputs. no connection to a termination voltage is required. the output driver is source terminated to 50 ? on-chip, providing a snubbing of any reflections. out- put power can be cut by tying v ee to v cc. in single ended mode, the unused output must be terminated with 50 ? . some output termination examples are shown in figures 6 and 7. figure 6: examples of high-speed output i/o termination for VSC830 v cc v cc 50 ? 50 ? 50? 0.1 f 0.1 f 50? v cc v cc z o = 50 ? v cc v cc 50 ? 50 ? 100? 0.1 f 0.1 f z o = 50 ? v cc v cc 50 ? 50 ? 0.1 f 0.1 f 50? 50? 100 pf z o = 50 ? a) ac termination #1 b) ac termination #2 (internal biasing required for receiver) c) ac termination #3
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 14 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com figure 7: examples of high-speed output i/o termination for VSC830 power supply and layout considerations the VSC830 is a single supply part, requiring only a 3.3v supply. the location and hook-up of the bypass capacitors is critical to providing the VSC830 with a clean 3.3v power supply. v cc that are adjacent can share a 0.027 f capacitor connected to v ee . normally the four channel specific v cc pins (v cc p1a, v cc p1b, v cc p2a, v cc p2b) are connected to one common v cc plane. in the same way the four channel specific v ee pins are connected to the common v ee plane. a suggested decoupling schematic for this configuration is shown in figure 7a. however, a slightly higher signal integrity can be achieved if these pins are treated as different power supplies. in this case, v cc p1a should then be decoupled to v ee 1a etc, as shown in figure 7b. v cc v cc 50 ? 50 ? 100? 0.1 f 0.1 f z o = 50 ? v cc v cc 50 ? 50 ? 50? 0.1 f 0.1 f 50? v cc v cc z o = 50 ? a) single-ended ac termination (receiver internal biasing required) b) dc termination
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 15 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com figure 8: decoupling example: common v cc and v ee planes v cc s2a v cc v cc v cc 1 2 3 4 5 6 7 8 9 10 11 v cc p2a v cc v cc p1b 33 32 31 30 29 28 27 26 25 24 23 v cc v cc v cc p2b v cc v cc v cc p1a 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 VSC830 c 1 c 1 c 1 c 1 c 1 c 1 c 1 c 1 c 1 v ee v ee top view heat spreader up v ee v ee v ee v ee v ee v ee v ee c 1 = 0.027 f v cc = v ee = +3.3v (v ee typically ground) recommended resistor and capacitor is size 805
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 16 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com figure 9: decoupling example: separate v cc and v ee planes v cc v cc v cc v cc 1 2 3 4 5 6 7 8 9 10 11 v cc p2a v cc v cc p1b 33 32 31 30 29 28 27 26 25 24 23 v cc v cc v cc p2b v cc v cc v cc p1a 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 c 1 c 1 c 1 c 1 c 1 c 1 c 1 c 1 c 1 c 1 c 1 c 1 c 1 v ee v ee v ee v ee v ee v ee v ee v ee v ee 2b v ee v ee 1a v ee 2a v ee 1b VSC830 top view heat spreader up c 1 = 0.027 f v cc = v ee = +3.3v (v ee typically ground) recommended resistor and capacitor is size 805
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 17 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com high-speed serial i/o layout considerations the high-speed serial signals contain digital data at fundamental frequencies up to 2.488ghz clock rate. given that, in order to preserve the edges of such data sequences, it is necessary to have excellent frequency and phase response up to at least the 3 rd harmonic, if not the 7 th harmonic. improved signal quality will result should the reader follow the general design rules below: 1. keep traces as short as possible. initial component placement should be very carefully considered. 2. the impedance of the traces must match that of the terminations, connectors and cable(s) in order to reduce reflections and impedance mismatches. reflections can create standing waves that will increase the signal jitter. 3. differential transmission line impedance must be maintained at 100 ? . 4. when routing differential pairs, keep the lengths identical for both traces. differences in trace length trans- late directly into signal skew and can add to the signal jitter. remember also that the differential impedance is affected by the separation between the traces. 5. keep differential pair traces on the same side of the pcb to minimize impedance discontinuity, such as the one caused when using printed-circuit board vias. 6. eliminate or reduce stubs. 7. use rounded corners rather than 45 or 90 corners. 8. keep signal traces far from other signals which might capacitively couple noise into the signals. this includes the other trace of a differential pair or the traces of the parallel pecl or ttl interface. 9. do not cut up the power or ground planes in an effort to steer current paths. this usually produces more noise, not less.
vitesse semiconductor corporation data sheet VSC830 dual 2x2 crosspoint switch 2.7gb/s asynchronous g52192-0, rev 4.0 page 18 05/23/01 ? vitesse semiconductor corporation 741 calle plano camarillo, ca 93012 tel: (800) vitesse fax: (805) 987-5896 email: prodinfo@vitesse.com internet: www.vitesse.com

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